Semiconductor devices are found in many products in the fields of entertainment, communications, networks, computers, and household markets. Semiconductor devices are also found in military, aviation, automotive, industrial controllers, and office equipment. The semiconductor devices perform a variety of electrical functions necessary for each of these applications.
Semiconductor devices operate by exploiting the electrical properties of semiconductor materials. By controlling the conductivity and resistivity of semiconductor materials, electronic devices and integrated circuits are formed over a semiconductor substrate. The devices and circuits include multiple layers of semiconductor, insulator and conductive materials.
The manufacture of semiconductor devices involves formation of a wafer having a plurality of die. Each semiconductor die contains hundreds or thousands of transistors and other active and passive devices performing a variety of electrical functions. For a given wafer, each die from the wafer typically performs the same electrical function. Semiconductors devices are formed in two steps referred to as front-end and back-end manufacturing.
Front-end manufacturing generally refers to formation of the semiconductor devices on the wafer. During formation of the devices, layers of a dielectric material such as silicon dioxide are deposited over the wafer. The dielectric facilitates the formation of transistors and memory devices. Metal layers are deposited over the wafer to interconnect the various semiconductor devices. The finished wafer has an active side containing the transistors and other active and passive components. After the devices are formed, they are tested in a preliminary testing step to verify the devices are operational. If a sufficiently high number of devices is discovered to contain defects, the devices or even the entire wafer may be discarded.
Back-end manufacturing refers to cutting or singulating the finished wafer into the individual die and then packaging the die for structural support and environmental isolation. To singulate the die, the wafer is scored and broken along non-functional regions of the wafer called saw streets or scribes. In some cases, the wafer is singulated using a laser cutting device. After singulation, the individual dies are mounted to a package substrate that includes pins or contact pads for interconnection with other system components. Contact pads formed over the semiconductor die are then connected to contact pads within the package. Often, wirebonding is used to make the connection, however other connection technologies such as solder bumps or stud bumping may be used. After wirebonding, an encapsulant or other molding material is deposited over the package to provide physical support and electrical insulation. The finished package is then inserted into an electrical system and the functionality of the semiconductor is made available to the other system components.
One goal of semiconductor manufacturing is to produce a package suitable for faster, reliable, smaller, and higher-density integrated circuits (ICs) at lower cost. Flip chip packages or wafer level packages (WLP) are ideally suited for ICs demanding high speed, high density, and greater pin count. Flip chip style packaging involves mounting the active side of the die facedown toward a chip carrier substrate or printed circuit board (PCB). The electrical and mechanical interconnect between the active devices on the die and conduction tracks on the carrier substrate is achieved through a solder bump structure comprising a large number of conductive solder bumps or balls. The solder bumps are formed by a reflow process applied to solder material deposited on contact pads which are disposed on the semiconductor substrate. The solder bumps are then soldered to the carrier substrate. The flip chip semiconductor package provides a short electrical conduction path from the active devices on the die to the carrier substrate in order to reduce signal propagation distance, lower capacitance, and achieve overall better circuit performance.
In many applications, it is desirable to vertically stack semiconductor die for greater device integration and minimize interconnect routing within a package. The electrical interconnection between stacked semiconductor die or packages has been done with through hole vias which traverse from the front side to the backside of the die. The through hole vias are formed by drilling through the active area of the die. However, the drilling process is disruptive and can cause damage to the wafer and/or die. Furthermore, because the through hole vias occupy a portion of the active area of the die, the functional area of the die is minimized, limiting the amount of circuitry that can be formed within the die. Finally, when interconnecting die using conventional through hole vias, the stand off height between the die is largely uncontrolled because the height of conventional via interconnection methods vary and are difficult to control.
A need exists to interconnect stacked semiconductor die using through hole vias that provide a consistent and controllable stand off height while minimizing manufacturing cost and increasing efficiency.